.. _multiplexer:

Multiplexer
===========

All project design I/O is routed through the Project Multiplexer. It makes sure that only the selected design has its outputs routed to the I/O pins.
5 input-only pads serve as the project selection. These pads have internal pull-ups. Any design can thus be permanently selected during wire bonding by bonding select pads to ground while leaving the rest to float high.

I/O Routing and design selection
--------------------------------

Every design has access to up to 42 bi-directional I/O lines with a 24mA drive strength. To accomplish this, the ``bidir[41:0]`` pad signals are routed to the designs as follows:

* All designs directly read from ``bidir_PAD2CORE`` or ``io_in_buffered``
* Two sets of wires, ``io_out_[design_name]`` and ``io_oe_[design_name]`` leave each design and are routed into the Multiplexer
* As the name implies, the Multiplexer only passes one set of io outs and output enables to the chip pads’ ``bidir_CORE2PAD`` and ``bidir_CORE2PAD_OE``
* ``bidir_CORE2PAD_IE`` is automatically generated by inverting ``bidir_CORE2PAD_OE``
* For each design, the Multiplexer provides a fixed config for ``bidir_CORE2PAD_SL``, ``bidir_CORE2PAD_PU``, ``bidir_CORE2PAD_PD`` and ``bidir_CORE2PAD_CS``

Additionally, all non-selected designs are held perpetually in reset to minimize dynamic power consumption.

To reduce fan-out at ``bidir_PAD2CORE``, a "InputRepeater" macro exists on the die, consisting only of buffers which repeat ``bidir_PAD2CORE`` into ``io_in_buffered``. As this creates additional input delay, some performance-critical designs still sample ``bidir_PAD2CORE`` directly. Designs where clock rate is of no special concern make use of ``io_in_buffered``.

Design address map
------------------

Note that all design selection pads have internal pull-ups. For cases where project selection is to be hard-wired, a "0" corresponds to a bonded pad and a "1" corresponds to a floating pad.

.. role:: strikethrough

=======  =====================================
Address  Name
=======  =====================================
'b00000  All pads output low
'b00001  `VGA Demo - TT Logo </vga.html>`__
'b00010  `VGA Demo - wafer.space screensaver </vga.html>`__
'b00011  `Hellorld & Diceroll & LED Blinker </misc.html>`__
'b00100  `HP Nanoprocessor replica </nanoproc.html>`__
'b00101  `VGA Demo - 24-bit color test </vga.html#bit-color-vga-demo>`__
'b00110  `Simple 8-bit CPU </simplecpu.html>`__
'b00111  All pads output low
'b01000  `RV32IMA core (6510-compatible pinout) </rv32.html>`__
'b01001  `RV32IMA core (6502-compatible pinout) </rv32.html>`__
'b10000  `SID 2 (FM Synth) </fm.html>`__
'b10100  :strikethrough:`Secret Message` Nothing
'b11000  `NTSC Test signal generator </ntsc.html>`__
'b11001  `Retro DRAM Controller </dramcontroller.html>`__
'b11010  `Retro GPIO Chip </gpio.html>`__
'b11011  `SID Replica </sid.html>`__
'b11100  `6502 core (6510-compatible pinout) </as65cxx.html>`__
'b11101  `6502 core (6502-compatible pinout) </as65cxx.html>`__
'b11110  `C64 PLA Replica </pla.html>`__
'b11111  All pads high-impedance
=======  =====================================